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INTEGRATED CIRCUITS
DATA SHEET
TDA8051 QPSK receiver
Product specification Supersedes data of 1998 Jan 08 File under Integrated Circuits, IC02 1999 Aug 20
Philips Semiconductors
Product specification
QPSK receiver
FEATURES * High operating input sensitivity * Gain controlled amplifier * PLL controlled carrier frequency * Low crosstalk between I and Q channel outputs * 3-wire transmission bus * 5 V supply voltage. APPLICATIONS * BPSK/QPSK demodulation. GENERAL DESCRIPTION
TDA8051
This TDA8051 is a monolithic bipolar IC intended for Quadrature Phase Shift Key (QPSK) demodulation. It includes: * Low noise RF and gain controlled amplifier * Two matched mixers * Symmetrical Voltage Controlled Oscillator (VCO) with 0 to 90 signal generator whose frequency is controlled by an integrated Phase Lock Loop (PLL) circuit. * Two matched amplifiers for output base-band active filtering and output buffers The gain control is produced by output level detection compared with an external pre-fixed reference. The PLL consists of: * Divide by four preamplifier * 12-bit programmable main divider * Crystal oscillator with 8-bit programmable reference divider * Phase/frequency detector combined with charge pump to drive tuning amplifier * 30 V output
QUICK REFERENCE DATA All AC units are RMS values unless otherwise specified. SYMBOL VCC fI(LNA) VI(LNA) I-Q GI-Q CT(I-Q) IM3 Vo fstep fxtal Tamb PARAMETER supply voltage range input carrier frequency at LNA input input level at LNA input phase error between I and Q channels gain error between I and Q channels crosstalk between I and Q channels 3rd-order intermodulation distortion in I and Q channels (0 dBmV at LNA_IN) voltage output on pin I_OUT and Q_OUT step at output crystal frequency operating ambient temperature MIN. 4.75 44 -30 - - - - - 50 1 0 - - 3 1 -30 - 48 - - - TYP. 5.00 MAX. 5.25 130 0 - - - -45 - 250 4 70 V MHz dBmV deg dB dBc dBc dBmV kHz MHz C UNIT
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8751T SO32 DESCRIPTION plastic small outline package; 32 leads; body width 7.5 mm VERSION SOT287-1
1999 Aug 20
2
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Q_OUT1 I_IN1 A1VCC 6 9 LNA_IN 8 LNA_OUT DEMOD_IN CLK DATA EN TUNE CP DIGITAL PHASE COMPARATOR PROGRAMMABLE MAIN DIVIDER 1/4 7 14 15 16 19 18 21 22 TKB TKA 3-WIRE BUS TRANSCEIVER 90 1/2 A2VCC 23 A3VCC 25 DVCC 13 OUTVCC 27 AGC_IN 11 I_OUT1 5 Q_IN1 28 29 4 3 1 2 I_OUT2 I_OUT I_OUTC Q_OUT Q_OUTC Q_OUT2
BLOCK DIAGRAM
Philips Semiconductors
QPSK receiver
x x
TDA8051
0
32 31 30
Fig.1 Block diagram.
handbook, full pagewidth
3
CHARGE
PROGRAMMABLE REF DIVIDER
1/2
12
OSC_IN
17 TEST n.c.
10 A1GND
24
26
20
FCE112
A2GND OUTGND
DGND
Product specification
TDA8051
Philips Semiconductors
Product specification
QPSK receiver
PINNING SYMBOL I_OUT I_OUTC I_OUT2 I_IN1 I_OUT1 A1VCC DEMOD_IN LNA_OUT LNA_IN A1GND AGC_IN OSC_IN DVCC CLK DATA EN TEST CP TUNE DGND TKB TKA A2VCC A2GND A3VCC OUTGND OUTVCC Q_OUT1 Q_IN1 Q_OUT2 Q_OUTC Q_OUT PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION I data buffered balanced output I data buffered balanced output I data filtered output input to active filter amplifier for I data I data raw output analog supply voltage 1 demodulator RF input low noise amplifier RF output low noise amplifier RF input analog ground 1 AGC control voltage input oscillator input digital supply voltage 3-wire bus serial control clock 3-wire bus serial control data 3-wire bus serial control enable (active LOW) not connected charge pump output for PLL loop filter tuning voltage output digital ground VCO tank circuit input VCO tank circuit input analog supply voltage 2 analog ground 2 analog supply voltage 3 output amplifiers ground output amplifiers supply voltage Q data raw output input to active filter amplifier for Q data Q data filtered output Q data buffered balanced output Q data buffered balanced output Fig.2 Pin configuration.
LNA_OUT 8
handbook, halfpage
TDA8051
I_OUT 1 I_OUTC 2 I_OUT2 3 I_IN1 4 I_OUT1 5 A1VCC 6 DEMOD_IN 7
32 Q_OUT 31 Q_OUTC 30 Q_OUT2 29 Q_IN1 28 Q_OUT1 27 OUTVCC 26 OUTGND 25 A3VCC
TDA8051
LNA_IN 9 A1GND 10 AGC_IN 11 OSC_IN 12 DVCC 13 CLK 14 DATA 15 EN 16
FCE171
24 A2GND 23 A2VCC 22 TKA 21 TKB 20 DGND 19 TUNE 18 CP 17 TEST
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
FUNCTIONAL DESCRIPTION The QPSK modulated signal is applied to the input as an asymmetrical RF signal in the bandwidth 44 to 130 MHz. The spectrum extension to this waveform must be limited by a band-pass filter superseding the IC. The RF input is either the LNA input, if the level is -30 to 0 dBmVrms, or the DEMOD input if the level is -20 to +10 dBmVrms. The amplified RF signal is then mixed with two clocks in quadrature to provide the base-band demodulated In-phase (I) and Quad-phase (Q) signals. The VCO operates at twice the RF carrier frequency in the bandwidth 88 - 260 MHz (one octave), therefore the 0 to 90 clocks are generated by a divider by 2. The VCO frequency can be programmed by an integrated PLL that tunes the external LC tank circuit.
TDA8051
The raw I and Q generated signals contain spurious spikes, therefore each signal is passed through a third order active low-pass filter (RC cell + Sallen-Key structure), whose cut-off frequency is set by external components. The filtered I and Q data signals are then amplified to provide balanced buffer outputs. The data sent to the PLL is loaded in bursts, framed by signal EN. Programming clock edges, together with their relevant data bits, are ignored until EN becomes active (LOW). The internal latches are updated with the latest programming data when EN returns to inactive (HIGH). The last 14 bits only are retained within the programming register. No check is made on the number of clock pulses received while programming is enabled. An active clock edge causing a shift of the data bits is generated when EN goes HIGH while CLOCK is still LOW. The main divider ratio and the reference divider ratio are provided via the serial bus (see Table 1).
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC V(max) tsc Tstg Tj(max) Tamb VCC(tune) HANDLING HBM ESD: The IC pins withstand 2 kV except pin 26 (1750 V). MM ESD: The IC pins withstand 100 V except pins 2 and 31 (75 V). THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 65 UNIT K/W supply voltage maximum voltage on all pins except pin 9 (5 V) maximum short circuit duration on outputs storage temperature maximum junction temperature operating ambient temperature tuning voltage supply PARAMETER MIN. -0.3 -0.3 - -40 - 0 -0.3 MAX. 6.0 VCC 10 +150 150 70 30 V V s C C C V UNIT
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
CHARACTERISTICS Measured in application circuit with the following conditions: VCC = 5 V; Tamb = 25C. All AC units are RMS values, unless otherwise specified. SYMBOL Supplies VCCA1 ICCA1 VCCA2 ICCA2 VCCA3 ICCA3 Vcc(o) Icc(o) VCCD ICCD VCC(tune) analog supply voltage analog supply current analog supply voltage analog supply current analog supply voltage analog supply current output supply voltage output supply current digital supply voltage digital supply current tuning supply voltage 4.75 - 4.75 - 4.75 - 4.75 - 4.75 - - - -30 44 - - - - fN x LO = 140 - 860 MHz; pin LNA_OUT connected to DEMOD_IN fLO/2 = 70 - 130 MHz; pin LNA_OUT connected to DEMOD_IN GLNA Vo Vo LNA gain output level output flatness f = 100 MHz; VI(LNA) = 0 dBmV - in 1 MHz bandwidth; VI(LNA) = 0 dBmV 44 to 70 MHz; VI(LNA) = 0 dBmV 70 to 130 MHz; VI(LNA) = 0 dBmV IM3 3rd-order intermodulation at pin LNA_IN at 103 to 105 MHz - 5 23 5 18 5 29 5 17 5 13 - 5.25 - 5.25 - 5.25 - 5.25 - 5.25 - 30 V mA V mA V mA V mA V mA V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Low noise amplifier: Rs = 75 /Ri = 75 unless otherwise specified VI(DC) Vi fi Ri Ci RLLNA NFLNA Vleak(LO) DC input level input level input carrier frequency input resistance input capacitance input return loss noise figure LO leakage on pin at LNA_IN internally set 0.85 - - - 75 2.5 -15 7 - 0 130 - - - 11 -15 V dBmV MHz pF dB dB dBmV
-
-35
-30
dBmV
8 -20 - - -
10 -
- +10
dB dBmV dB dB dB dBc
0.25 0.5 0.50 - 1.3 - 1.5 -60
2 carriers at +10 dBmV each -
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL Vo(DC) Ro
PARAMETER DC output level output resistance
CONDITIONS - - -
MIN.
TYP. 1.3 75 - - -
MAX. V
UNIT
Quadrature demodulator: Rs = 75 /Ri = 20 k unless otherwise specified VI(DC) Vi fi Ri Ci RLI Vo(I-Q) Bo(I-Q) C/N DC input level input level input carrier frequency input resistance input capacitance input Return Loss output level on pin I_OUT1 or Q_OUT1 output 3 dB bandwidth carrier to noise ratio at 500 kHz on pin at I_OUT1 or Q_OUT1 LO leakage on pin DEMOD_IN AGC range LO = 200 MHz; RF = 100 to 130 MHz VI = -20 dBmV; Vo(I and Q) = 22 dBmV VI = 10 dBmV; Vo(I and Q) = 22 dBmV fLO = 140 to 260 MHz; fLO/2 = 70 to 130 MHz fLO = 200 MHz; fRF = 100.25 MHz at -20 to +10 dBmV; fBF = 250 kHz at 22 dBmV fLO = 200 MHz; fRF = 100.25 MHz at -20 to +10 dBmV; fBF = 250 kHz at 22 dBmV internally set 1 - - 75 2.5 -12 22 35 88 93 - - V dBmV MHz pF dB dBmV MHz dBc/Hz dBc/Hz dBmV dB -20 44 - - - - - - - - 30 +10 130 - - - - 38 - - -15 -
Vleak(LO) VAGC(r)
VAGC(s)
AGC slope maximum
-
30
-
dB/V
VAGC Gmax
gain control voltage at AGC_IN max. conversion gain fLO = 260 MHz; fRF = 130.25 MHz at -20 dBmV; VAGC = 4.5 V fLO = 140 MHz; fRF = 70.25 MHz at 10 dBmV VAGC = 0.5 V fLO = 140 to 260 MHz; fRF = 70.25 to 130.25 MHz; fBF = 250 kHz at 22 dBmV over specified input range fLO = 140 to 260 MHz; fRF = 70.25 to 130.25 MHz; fBF = 250 kHz at 22 dBmV over specified input range
10% VCCA - 42 -
90% VCCA V - dB
Gmin
min. conversion gain
-
-
12
dB
I-Q
phase error between I and Q channels
-
3
-
deg
GI-Q
gain error between I and Q channels
-
1
-
dB
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL I-Q
PARAMETER phase error between I and Q channels
CONDITIONS fLO = 88 to 140 MHz; fRF = 44.25 to 70.25 MHz; fBF = 250 kHz at 22 dBmV over specified input range fLO = 88 to 140 MHz; fRF = 44.25 to 70.25 MHz; fBF = 250 kHz at 22 dBmV over specified input range see Fig.3 see Fig.3 guaranteed by design; see Fig.4 in 1 MHz bandwidth f = 40 to 70 MHz f = 70 to 130 MHz -
MIN.
TYP. 3 -
MAX.
UNIT deg
GI-Q
gain error between I and Q channels
-
1
-
dB
IM3 IM2 AMREJ Vo(I/Q)
3rd-order intermodulation in I and Q channels 2nd-order intermodulation in I and Q channels AM rejection at I and Q channels output flatness at I and Q outputs
- - - - - - - - - - - -
- - -
-45 -40 -38
dBc dBc dBc dB dB dB V
0.25 - 3 3 2.5 400 - - - - - - - -
Vo(DC) Ro
DC output level output resistance
Output section: Rs = 400 /Ri = 4 k/R on pin I_OUT2 or Q_OUT2 = 20 k unless otherwise specified VI(DC) Vi Ri Ci GO DC input voltage input level input resistance input capacitance gain from I-Q_IN1 to I-Q_OUT2 fBF = 1 MHz at 22 dBmV fBF = 0 to 1.5 MHz 3.6 22 0.4 3.8 V dBmV k pF dB dB dB V dBc dBc dBc dBc dBmv/Hz dB
17.5 -
- -
Vo(I-Q_out2) output flatness on pins I_OUT2 and Q_OUT2 Vo(flt) Ro H2 H3 IM3 CT(I-Q) No GI-Q DC output level at filter output output resistance 2nd harmonic 3rd harmonic 3rd-order intermodulation at pins I_OUT and Q_OUT crosstalk between I and Q channels output noise power at 500 kHz from carrier gain from I-Q_IN1 to I-Q_OUT
0.25 - 1 2.6 250 -40 -45 -50 -40 -56 27 - - - -35 -40 -45 -30 - -
fBF = 0 to 6 MHz at 22 dBmV - input - f < 20 MHz fBF = 1 MHz at 48 dBmV output fBF = 1 MHz at 48 dBmV output see Fig.5 f = 5 MHz; see Fig.6 see Fig.7 fBF = 1 MHz at 22 dBmV input - - - - - - -
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL V1(I-Q) Ro(dif)
PARAMETER DC output level on pin I-Q_OUT output differential resistance
CONDITIONS - - - - - - - -
MIN.
TYP. 3.1 460 - - -
MAX. V
UNIT
Overall: Rs = 75 /Ri = 4 k unless otherwise specified Vo LOlev So GI-Q AMR IM3 voltage output on pins I_OUT and Q_OUT LO level on pins I_OUT and Q_OUT spurious emission on pins I_OUT and Q_OUT gain error on pins I_OUT and Q_OUT AM rejection in I and Q channels 3rd-order intermodulation see Fig.8 see Fig.8 f = 0 to 5 MHz; see Fig.8 see Fig.8 guaranteed by design; see Fig.9 guaranteed by design; see Fig.10 48 - -40 1 - - dBmV dBc dBc dB dBc dBc
-45 - - -40 -45
Voltage Controlled Oscillator (VCO) fvco(min) fvco(max) N(osc) min. oscillation frequency max. oscillation frequency oscillator phase noise note 1 note 1 at 10 kHz at 100 kHz Phase Locked Loop (PLL) Step RD RDR ND NDR I(CP) fxtal Zi VI(DC) Vi frequency step size fixed reference divider ratio programmable reference divider ratio programmable fix main divider ratio main divider ratio charge pump current rxtal = 25 to 200 fxtal = 4 MHz at pin VCO output 100 - 2 - 128 - 1 600 - - - 2 - 4 - 300 - 120 0 2.9 30 500 - 80 - 2600 - 4 - - - kHz - - - - A MHz V mVrms - - - - 88 260 -75 -95 - - - - MHz MHz dBc/Hz dBc/Hz
Crystal oscillator crystal frequency crystal oscillator input impedance (absolute value) DC input level input level
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL 3-wire bus VIL VIH fclk tsu th td(strt) td(stp) Notes
PARAMETER
CONDITIONS -
MIN.
TYP. - - 330 2 1 3 3
MAX.
UNIT
input Low level input High level clock frequency input data to CLK set-up time input data to CLK hold time delay to rising clock edge delay from last clock edge
guaranteed by design guaranteed by design guaranteed by design guaranteed by design guaranteed by design guaranteed by design guaranteed by design
0.8 - - - - - -
V V kHz s s s s
2.4 - - - - -
1. The frequency range of the receiver is 44 to 130 MHz. The local oscillator (LO) operates at twice the output frequency (88 to 260 MHz). Frequency control by varicap diodes allows a variation over one octave. 2. Crystal oscillator. The crystal oscillator uses a 4, 2 or 1 MHz crystal in series with a capacitor. The crystal is parallel resonant with load capacitance of 18 to 20 pF. Connection to VCC is preferred but can also be to GND. Note to characteristics
handbook, full pagewidth
DEMOD_IN
x
0 90 +5 V
I_OUT1
VCO 200 MHz
105 MHz
103 MHz
x
Q_OUT1
10 dB above max. input level = 20 dBmVrms each tone maximum input level nominal output level = 22 dBmVrms each tone
+10 dB = 32 dBmVrms each tone
IM3 IM2
103
105
f (MHz)
1
2
3
5
7
f (MHz)
FCE172
Fig.3 IM2 and IM3 measurement of the demodulator.
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
handbook, full pagewidth
DEMOD_IN
x
0 90 +5 V
I_OUT1
VCO 200 MHz
105 MHz 103 MHz
x
Q_OUT1
10 dB above max. input level = 20 dBmVrms maximum input level
+ 22 dBmVrms
AM_REJ
103
105
f (MHz)
baseband demodulated AM (15 KHz spacing)
3
f (MHz) AM sidebands (15 KHz offset)
FCE173
Fig.4 AM rejection test.
handbook, full pagewidth
I_OUT2 I_OUT
I_OUTC Q_OUT 22 dBmV 300 kHz 22 dBmV 500 kHz Q_OUTC Q_OUT2
FCE174
Fig.5 IM3 measurement of the output section.
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
handbook, halfpage
I_OUT2 I_OUT
I_OUTC Q_OUT
22 dBmV 5 MHz Q_OUT2
Q_OUTC
FCE175
(1) Measure I and Q, is the difference between the two carriers.
Fig.6 Crosstalk measurement.
handbook, halfpage
Q_OUT
RS 2 k Q_OUT2
Q_OUTC
FCE176
Fig.7 Noise measurement.
handbook, full pagewidth
Q_OUT 10 nF Q_OUT1 100 pF Q_OUT2 Q_OUTC
FCE177
1.2 k
LNA input: -15 dBmV; AGC set in order to have a 250 kHz output sine wave at 48 dBmV; fref = 70 to 130 MHz; flo = 140 to 260 MHz.
Fig.8 LO level, spurious, I/Q gain error and Vo measurements.
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
handbook, full pagewidth
LNA_IN
x
0 90 +5 V
I_OUT1
VCO 200 MHz
100.3 MHz 102 MHz
x
Q_OUT1
100 % AM modulation square wave 15 kHz input signals at LNA_IN +10 dBmV I_OUT or Q_OUT +42 dBm(Vrms) AM_REJ
0 dBmV
100.3
102
f (MHz) baseband demodulated AM (15 KHz spacing)
300
f (MHz) AM sidebands (15 KHz offset)
FCE178
Fig.9 Overall AM rejection measurement.
handbook, full pagewidth
LNA_IN
x
0 90 +5 V
I_OUT1
VCO 200 MHz
100.5 MHz
100.3 MHz
x
Q_OUT1
0 dB dBm(Vrms) each tone
+42 dB dBm(Vrms) each tone
IM3 IM2
100.3
100.5
f (MHz)
100 200 300
500
700
f (kHz)
FCE179
Fig.10 Overall IM3 measurement.
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TIMING CHARACTERISTICS
TDA8051
handbook, full pagewidth
t sup
tH
t xtal
CLK
DATA
EN
t strt
t stp
FCE180
Fig.11 Logic interface signals.
DATA FORMAT Table 1 FIRST Data D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 AD1 AD0 LAST
Reference ratio X X X X R7 R6 R5 R4 R3 R2 R1 R0 0 1
Principal ratio P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0 1 1
1999 Aug 20
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I DATA BUFFERED BALANCED OUTPUT Q DATA BUFFERED BALANCED OUTPUT I_OUT 1 I_OUTC 2 I_OUT2 3 I_IN1 4 I CHANNEL FILTERING 32 Q_OUT
APPLICATION INFORMATION
Philips Semiconductors
QPSK receiver
TDA8051
31 Q_OUTC 30 Q_OUT2 29 Q_IN1 Q CHANNEL FILTERING
I_OUT1 5 6 DEMOD_IN 7 0 1/2
28 Q_OUT1
A1VCC
x
27 26
OUTVCC OUTGND A3VCC A2GND A2VCC
x
90
25 24 23
LNA_OUT 8
handbook, full pagewidth
15
RF INPUT A1GND DVCC CLK DATA EN 3-WIRE BUS
LNA_IN 9 10 AGC_IN 11 1/4
22
TKA
21 TKB Voltage Controlled Oscillator DGND
OSC_IN 12 13 14 15 16 BUS
1/2
1/RDR
CMP
1/NDR 20
19 TUNE CHARGE PUMP 18 CP 17
FCE113
TEST n.c.
+30 V
Product specification
TDA8051
Fig.12 Application diagram.
Philips Semiconductors
Product specification
QPSK receiver
INTERNAL PIN CONFIGURATIONS SYMBOL I_OUT I_OUTC 1 2
2 1
TDA8051
PIN
DESCRIPTION 3.1 V 3.1 V
DC VOLTAGE
OUTGND
FCE025
I_OUT2
3
2.6 V
3
OUTGND
FCE026
I_IN1
4
3.6 V
4
OUTGND
FCE027
I_OUT1
2.5 V
5
OUTGND
FCE028
A1VCC
6
Analog supply voltage 1
5V
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL DEMOD_IN 7
PIN
DESCRIPTION 1V
DC VOLTAGE
7
FCE127
A1GND
LNA_OUT
8
1.3 V
8
A1GND
FCE128
LNA_IN
9
0.9 V
9
A1GND
FCE129
A1GND AGC_IN
10 11
analog ground 1
0. V -
11
FCE030
A2GND
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL OSC_IN 12
PIN
DESCRIPTION 3.0 V
DVCC
DC VOLTAGE
12
FCE031
DVCC CLK
13 14
digital supply voltage
5V n.a.
14
FCE032
DATA
15
n.a.
15
FCE033
EN
16
n.a.
16
FCE034
TEST CP
17 18
not connected
n.a. 1.9 V
DVCC DOWN
18 UP
FCE035
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL TUNE 19
PIN
DESCRIPTION VVT
19
DC VOLTAGE
FCE036
DGND
20
SUB 20
FCE037
0V
TKB TKA
21 22
21 22
2.4 V 2.4 V
A2GND
FCE038
A2VCC A2GND A3VCC OUTGND
23 24 25 26
analog DC supply voltage 2 analog ground 2 analog supply voltage 3
26
5V 0V 5V 0V
DGND
FCE040
OUTVCC Q_OUT1
27 28
output amplifiers supply voltage
5V 2.5 V
28
OUTGND
FCE041
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
TDA8051
SYMBOL Q_IN1 29
PIN
DESCRIPTION 3.6 V
DC VOLTAGE
29
OUTGND
FCE042
Q_OUT2
30
2.6 V
30
OUTGND
FCE043
Q_OUTC Q_OUT
31 32
3.1 V 3.1 V
31
32
OUTGND
OUTGND
FCE044
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
PACKAGE OUTLINE SO32: plastic small outline package; 32 leads; body width 7.5 mm
TDA8051
SOT287-1
D
E
A X
c y HE vM A
Z 32 17
Q A2 A1 pin 1 index Lp 1 e bp 16 wM L detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 0.02 0.01 c 0.27 0.18 0.011 0.007 D (1) 20.7 20.3 0.81 0.80 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.419 0.394 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.2 1.0 0.047 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.95 0.55 0.037 0.022
0.012 0.096 0.004 0.086
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT287-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-25 97-05-22
1999 Aug 20
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Philips Semiconductors
Product specification
QPSK receiver
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA8051
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Aug 20
22
Philips Semiconductors
Product specification
QPSK receiver
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE HLQFP, HSQFP, HSOP, SMS PLCC(3), SQFP SSOP, TSSOP, VSO Notes SO LQFP, QFP, TQFP not suitable(2) suitable not recommended(3)(4) not suitable not recommended(5) suitable suitable suitable suitable suitable
TDA8051
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
1999 Aug 20
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 67
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/25/02/pp24
Date of release: 1999
Aug 20
Document order number:
9397 750 04691

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